类型 | 描述 |
---|
安装方式 | Surface Mount |
引脚数 | 6 Pin |
电源电压 | 2.30 V to 3.60 V |
封装 | DSBGA-6 |
输出接口数 | 1 Output |
输出电流 | 4.00 mA |
电路数 | 1 Circuit |
位数 | 1 Bit |
传送延迟时间 | 3.50 ns |
电压波节 | 2.50 V, 3.30 V |
类型 | 描述 |
---|
产品生命周期 | Active |
包装方式 | Cut Tape (CT) |
逻辑类型Logic Type| 变换器 Translator \---|--- 电路数Number of Circuits| 3 输入数Number of Inputs| 电压 Voltage 电源电压VccVoltage - Supply| 电压 Voltage 静态电流IqCurrent - Quiescent (Max)| 输出高,低电平电流Current - Output High, Low| 3 低逻辑电平Logic Level - Low| 1 高逻辑电平Logic Level - High| 无/无 No/No 传播延迟时间@Vcc,CLMax Propagation Delay @ V, Max CL| 4.7ns Description & Applications| 2.3 V ~ 3.6 V 描述与应用| SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS DESCRIPTION/ORDERING INFORMATION AUP technology is the industry"s lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T97 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range. Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. The SN74AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed. • Available in the Texas Instruments NanoStar™ (TOP VIEW) Packages • Single-Supply Voltage Translator • 1.8 V to 3.3 V (at VCC = 3.3 V) • 2.5 V to 3.3 V (at VCC = 3.3 V) • 1.8 V to 2.5 V (at VCC = 2.5 V) DRY OR DSF PACKAGE • 3.3 V to 2.5 V (at VCC = 2.5 V) (TOP VIEW) • Nine Configurable Gate Logic Functions • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity • Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 µA) • Very Low Static and Dynamic Power YFP OR YZP PACKAGE Consumption (TOP VIEW) • Pb-Free Packages Available: SON (DRY or DSF), SOT-23 (DBV), SC-70 (DCK), and NanoStar WCSP • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) • Related Devices: SN74AUP1T98, SN74AUP1T57, and SN74AUP1T58
TI(德州仪器)
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TI(德州仪器)
74AUP1T 系列,Texas Instruments### 74AUP 系列工业标准高级超低功耗 (AUP) 逻辑系列产品,用于超低功耗、体积小的逻辑解决方案,适用于 1.8 V 和混合 1.8 V / 3.3 V 电路应用。 AUP 逻辑系列提供以下特征:广泛的电压范围:0.8 至 3.6V 施密特触发器输入,用于高抗杂讯度 极低的动态功耗 增强型 ESD 保护 速度/功耗优化
TI(德州仪器)
TEXAS INSTRUMENTS SN74AUP1T97DBVT 芯片, 电平转换器
TI(德州仪器)
TEXAS INSTRUMENTS SN74AUP1T97DCKR 芯片, 电平转换器, 3路输入, SC-70-6
TI(德州仪器)
单电源电压电平转换与9个可配置门逻辑功能 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
TI(德州仪器)
74AUP1T 系列,Texas Instruments### 74AUP 系列工业标准高级超低功耗 (AUP) 逻辑系列产品,用于超低功耗、体积小的逻辑解决方案,适用于 1.8 V 和混合 1.8 V / 3.3 V 电路应用。 AUP 逻辑系列提供以下特征:广泛的电压范围:0.8 至 3.6V 施密特触发器输入,用于高抗杂讯度 极低的动态功耗 增强型 ESD 保护 速度/功耗优化
TI(德州仪器)
单电源电压电平转换与9个可配置门逻辑功能 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
TI(德州仪器)
具有9个可配置门逻辑FUNTIONS单电源电压电平转换器 SINGLE SUPPLY VOLTAGE LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNTIONS
TI(德州仪器)
单电源电压电平转换与9个可配置门逻辑功能 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
TI(德州仪器)
单电源电压电平转换与9个可配置门逻辑功能 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
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